* TODO: if Guest Firmware or Guest OS will change this PMBA,
* More logic will be added.
*/
- pci_conf[0x40] = 0x41;
+ pci_conf[0x40] = 0x41; /* Special device-specific BAR at 0x40 */
pci_conf[0x41] = 0x1f;
acpi_map(d, 0, 0x1f40, 0x10, PCI_ADDRESS_SPACE_IO);
acpi_reset(d);
break;
case 0x0680:
if (vendor_id == 0x8086 && device_id == 0x7113) {
- /* PIIX4 ACPI PM */
- pci_config_writew(d, 0x20, 0x0000); /* NO smb bus IO enable in PIIX4 */
+ /*
+ * PIIX4 ACPI PM.
+ * Special device with special PCI config space. No ordinary BARs.
+ */
+ pci_config_writew(d, 0x20, 0x0000); // No smb bus IO enable
pci_config_writew(d, 0x22, 0x0000);
- goto default_map;
+ pci_config_writew(d, 0x3c, 0x0009); // Hardcoded IRQ9
+ pci_config_writew(d, 0x3d, 0x0001);
}
break;
case 0x0300:
pic_irq = pci_irqs[pin];
pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq);
}
-
- if (class== 0x0680&& vendor_id == 0x8086 && device_id == 0x7113) {
- // PIIX4 ACPI PM
- pci_config_writew(d, 0x20, 0x0000); // NO smb bus IO enable in PIIX4
- pci_config_writew(d, 0x22, 0x0000);
- pci_config_writew(d, 0x3c, 0x0009); // Hardcodeed IRQ9
- pci_config_writew(d, 0x3d, 0x0001);
- }
}
/*